Intel® FPGA SDK for OpenCL™ Pro Edition: Best Practices Guide

ID 683521
Date 12/19/2022
Document Table of Contents
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2.8. Accessing HLD FPGA Reports in JSON Format

In addition to the report.html file, the Intel® FPGA SDK for OpenCL™ also provides the HLD FPGA Report data in JSON files.

The JSON files containing the HLD FPGA Report report data are available in the <your_kernel_filename>/reports/lib/json directory. The directory provides the following .json files:

Table 9.  JSON Files in the <your_kernel_filename> /reports/lib/json Directory
File Description
area.json Area Analysis of System
block.json Block View of System Viewer
bottleneck.json Bottleneck View of Loop Analysis Report
gmv.json Global Memory View of the System Viewer
info.json Summary of project name, compilation command, versions, and timestamps
loops.json Navigation tree of Loop Analysis report
loops_attr.json Loop Analysis report
mav.json System View of System Viewer
new_lmv.json Kernel Memory Viewer
pipeline.json Cluster View of System Viewer
quartus.json Quartus Prime compilation summary
schedule.json Schedule Viewer
summary.json Kernel compilation name mapping
tree.json Navigation tree of System Viewer
warnings.json Compilation warning messages
Important: The structure of these JSON files might change from release to release without notice.

You can read the following .json files without a special parser:

  • area.json
  • area_src.json
  • loops.json
  • quartus.json
  • summary.json

For example, if you want to identify all of the values and bottlenecks for the initiation interval (II) of a loop, you can find the information in the children section in the loops.json file, as shown below:

“name”:”<block name|Kernel: kernel name>  # Find the loops which does not begin with “Kernel:”

“data”:[<Yes|No>, <#|n/a>, <II|n/a>]      # The data field corresponds to “Pipelined”, “II”, “Bottleneck”