R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 12/13/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4. PCI Express Mode

In PCI Express mode, only the PCI Express controller stack is active. The four PCI Express cores (x16, x8, x4_0 and x4_1) interface with the application logic in the FPGA fabric via Avalon® streaming interfaces.

Figure 19. R-tile Top-Level Block Diagram in PCI Express Mode