Intel® MAX® 10 FPGA 10M50 Evaluation Kit User Guide

ID 683447
Date 1/11/2024
Document Table of Contents

3.8.4. Flash

The Intel® MAX® 10 FPGA 10M50 Evaluation Kit provides a 512-Mb (megabit) quad SPI flash memory.

If you use the parallel flash loader (PFL) IP to program the quad SPI flash, you need to generate a .pof (Programmer Object File) to configure the device.

To generate a .pof file, follow these steps:

  1. Create a byte-order Quartus.ini file with the setting:


  2. Copy the .ini file to the project root directory and open the project with the Intel® Quartus® Prime Standard Edition software.
  3. Open Convert Programming Files tool to generate the .pof file.
Table 22.  Default Memory Map of the 512-Mb Quad SPI Flash
Block Description Size (KB) Address Range
Board Test System Scratch 512 0x03F8.0000 - 0x03FF.FFFF
User Software 56640 0x0083.0000 - 0x03F7.FFFF
Factory Software 4096 0x0043.0000 - 0x0082.FFFF
Board Information 64 0x0002.0000 - 0x0002.FFFF
User Design Reset Vector 64 0x0000.0000 - 0x0000.FFFF
Table 23.  Flash Pin Assignments, Schematic Signal Names, and Functions
Board Reference (U23) Signal Name Device/Pin Number I/O standard Description
U23.7 FLASH_CSn Intel® MAX® 10/A8 3.3 V Chip select
U23.16 FLASH_CLK Intel® MAX® 10/A9 3.3 V Clock

Intel® MAX® 10/B8


3.3 V Reset
U23.15 FLASH_D0 Intel® MAX® 10/C9 3.3 V Address Bus
U23.8 FLASH_D1 Intel® MAX® 10/C10 3.3 V Address Bus
U23.9 FLASH_D2 Intel® MAX® 10/C11 3.3 V Address Bus
U23.1 FLASH_D3 Intel® MAX® 10/A7 3.3 V Address Bus