AN 739: Altera 1588 System Solution

ID 683410
Date 1/28/2016
Public
Document Table of Contents

1.4.1. System Modules

Below are the modules available in the Altera 1588 system solution reference design:

  • A 1588 capable Ethernet MAC and PHY, capable of very precise time stamping of packets with ToD value and an indication on the time-stamp offset. This time stamping achieves equal accuracy in both 1-step and 2-step operations.
  • A ToD clock module that supports loading of real ToD value and fine-grain update of its value and frequency.
  • Clear-text packet parser that can be used to detect PTP packet types and then tell the Ethernet MAC the time-field offset for the following packet types: UDP over IPv4, UDP over IPv6, stacked VLAN. This block is made available in clear-text so that the user can easily augment the code to cover other packet types the users may need such as MPLS or MAC-in-MAC.
  • ToD synchronizer to synchronize different ToDs running in different clock domains; for example, in a system of network line cards to a system master ToD.

These building blocks can be put together in a useful system combined with the user provided CPU and software stack to create a high-quality 1588 solution. It is the responsibility of the software stack, which the user either creates or obtains from a third-party, to implement the overall 1588 stack, including the corresponding logic to support different modes for synchronization process.

The following diagram illustrates the hardware modules in this 1588 system reference design.

Figure 21. 1588 Hardware Modules