1.2.1. Understanding the Different PTP Clocks
1.2.2. Precision Time Protocol (PTP) Synchronization Process
1.2.3. Functional Flow For A 1588 Ordinary Clock Master/Slave Mode System
1.2.4. Functional Flow For A 1588 Transparent Clock Master/Slave Mode System
1.2.5. Functional Flow for A 1588 Boundary Clock Mode System
1.2.6. Timestamp Packet Functional Flow in Linux Driver
1.4. System Architecture
This section provides information on the modules used in the reference design, hardware interface signals, registers map, clock and reset scheme of the reference design.