DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 10/20/2022
Public

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Document Table of Contents

11.12.2.8. COLOR_PATTERN (0x5C)

Table 247.  COLOR_PATTERN (0x5C)
Name Bit(s) Access Description Reset
Reserved 31:14 - - -
Bit width 13:10 RO

The detected bit width of each color sample.

4'd0: 8 bits

4'd2: 10 bits

4'd4: 12 bits

4'd8: 16 bits

0x0
Reserved 9 - - -
Chroma sub-sampling 8:7 RO

The detected chroma sub-sampling.

2'd0: 420

2'd2: 422

2'd3: 444

0x0
Reserved 6:1 - - -
Color space 0 RO The detected color space.

1'd0: RGB

1'd1: YCbCr

0x0