AN 584: Timing Closure Methodology for Advanced FPGA Designs

ID 683145
Date 10/08/2021
Public
Document Table of Contents

1.6.7. Long Compilation Times

If timing performance is your most important criterion, the Compiler may require additional time to meet stringent requirements. Abnormally long compilations may indicate:
  • Resource constraint issues
  • Timing constraints that are impossible to meet
  • Logic loops that the Compiler cannot easily resolve
For any of these conditions, review the compilation warning messages to determine the portion of the design that is contributing most to the long compilation.

Fitter messages indicate any resource congestion that occurs. You can identify resource congestion by reviewing the resource utilization numbers in the Compilation Report. Utilization of 95% or more can be challenging to fit. In such cases, review your RTL code and consider recoding of blocks to reduce logic use and remove any redundancies.

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