F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 4/04/2022
Public

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8.2.2. Enabling the F-Tile Debug Toolkit

To enable the F-Tile Debug Toolkit in your design, enable the option Enable ftile Debug Toolkit in the Top-Level Settings options tab of the Intel FPGA F-Tile Avalon® -ST IP for PCI Express.

You must also enable the option Enable PHY reconfiguration interface for the Debug Toolkit to function as expected.

Note: When you enable the F-Tile Debug Toolkit in the IP, the Hard IP reconfiguration interface and the PHY reconfiguration interface will be used by the Debug Toolkit. Hence, you will not be able to drive logic on these interfaces from the FPGA fabric.

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