F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 4/04/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

A.2.2.4.1. ACS Extended Capability Header (Offset 0x0)

Table 135.  ACS Extended Capability Header
Bits Register Description Default Value Access
[15:0] PCI Express Extended Capability ID 0x000D RO
[19:16] Capability Version 0x1 RO
[31:20] Next Capability Pointer: Points to the Null Pointer

See description.

Programmed via Programming Interface.

RO

Did you find the information on this page useful?

Characters remaining:

Feedback Message