Avalon® Interface Specifications

ID 683091
Date 9/26/2022
Document Table of Contents

5.3.1. Synchronous Interface

All transfers of an Avalon® -ST connection occur synchronous to the rising edge of the associated clock signal. All outputs from a source interface to a sink interface, including the data, channel, and error signals, must be registered on the rising edge of clock. Inputs to a sink interface do not have to be registered. Registering signals at the source facilitates high frequency operation.