Avalon® Interface Specifications

ID 683091
Date 9/26/2022
Document Table of Contents

3.6. Address Alignment

The interconnect only supports aligned accesses. A host can only issue addresses that are a multiple of its data width in symbols. A host can write partial words by deasserting some byteenables. For example, the byteenables of a write of 2 bytes at address 2 is 4’b1100.