1. Introduction to the Avalon® Interface Specifications 2. Avalon® Clock and Reset Interfaces 3. Avalon® Memory-Mapped Interfaces 4. Avalon® Interrupt Interfaces 5. Avalon® Streaming Interfaces 6. Avalon® Streaming Credit Interfaces 7. Avalon® Conduit Interfaces 8. Avalon® Tristate Conduit Interface A. Deprecated Signals B. Document Revision History for the Avalon® Interface Specifications
2.1. Avalon® Clock Sink Signal Roles 2.2. Clock Sink Properties 2.3. Associated Clock Interfaces 2.4. Avalon® Clock Source Signal Roles 2.5. Clock Source Properties 2.6. Reset Sink 2.7. Reset Sink Interface Properties 2.8. Associated Reset Interfaces 2.9. Reset Source 2.10. Reset Source Interface Properties
5.1. Terms and Concepts 5.2. Avalon® Streaming Interface Signal Roles 5.3. Signal Sequencing and Timing 5.4. Avalon® -ST Interface Properties 5.5. Typical Data Transfers 5.6. Signal Details 5.7. Data Layout 5.8. Data Transfer without Backpressure 5.9. Data Transfer with Backpressure 5.10. Packet Data Transfers 5.11. Signal Details 5.12. Protocol Details
220.127.116.11. Read Bursts
Read bursts are similar to pipelined read transfers with variable latency. A read burst has distinct address and data phases. readdatavalid indicates when the agent is presenting valid readdata. Unlike pipelined read transfers, a single read burst address results in multiple data transfers.
These rules apply to read bursts:
- When a host connects directly to a agent, a burstcount of <n> means the agent must return <n> words of readdata to complete the burst. For cases where interconnect links the host and agent pair, the interconnect may suppress read commands sent from the host to the agent. For example, if the host sends a read command with a byteenable value of 0, the interconnect may suppress the read. As a result, the agent does not respond to the read command.
- The agent presents each word by providing readdata and asserting readdatavalid for a cycle. Deassertion of readdatavalid delays but does not terminate the burst data phase.
- For reads with a burstcount > 1, Intel recommends asserting all byteenables.
Note: Intel® recommends that burst capable agents not have read side effects. (This specification does not guarantee how many bytes a host reads from the agent in order to satisfy a request.)
Figure 15. Read BurstThe following figure illustrates a system with two bursting hosts accessing a agent. Note that Host B can drive a read request before the data has returned for Host A.
The numbers in this timing diagram, mark the following transitions:
- Host A asserts address (A0), burstcount, and read after the rising edge of clk. The agent asserts waitrequest, causing all inputs except beginbursttransfer to be held constant through another clock cycle.
- The agent captures A0 and burstcount at this rising edge of clk. A new transfer could start on the next cycle.
- Host B drives address (A1), burstcount, and read. The agent asserts waitrequest, causing all inputs except beginbursttransfer to be held constant. The agent could have returned read data from the first read request at this time, at the earliest.
- The agent presents valid readdata and asserts readdatavalid, transferring the first word of data for host A.
- The second word for host A is transferred. The agent deasserts readdatavalid pausing the read burst. The agent port can keep readdatavalid deasserted for an arbitrary number of clock cycles.
- The first word for host B is returned.