Agilex™ 3 FPGA and SoC C-Series Development Kits User Guide

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ID 851698
Date 9/02/2025
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 3 FPGA and SoC C-Series Development Kits User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Software and Driver Installation
2.2. Handling the Board x
2.2.1. Handling the DIP Switches
2.3. Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Development Kit 2.3.3. Installing the Ashling* RiscFree* Integrated Development Environment (IDE) 2.3.4. Installing the USB-Blaster III Driver
3. Development Kit Setup x
3.1. Default Settings 3.2. Powering Up the Development Board 3.3. Modes of Operations 3.4. Performing Board Restore
3.4. Performing Board Restore x
3.4.1. Restoring Board QSPI Flash U51 with Default Factory Image on Agilex™ 3 FPGA C-Series Development Kit 3.4.2. Restoring Board QSPI Flash U51 with Default Factory Image on Agilex™ 3 FPGA and SoC C-Series Development Kit 3.4.3. Restoring SD Card with Default Factory Image on Agilex™ 3 FPGA and SoC C-Series Development Kit
4. Board Test System x
4.1. Set Up the BTS GUI Running Environment 4.2. BTS Functionalities
4.1. Set Up the BTS GUI Running Environment x
4.1.1. Setting Up the Quartus® Prime Software for BTS Operation 4.1.2. Running the BTS GUI
4.2. BTS Functionalities x
4.2.1. The Agilex™ 3 FPGA Functionality 4.2.2. Other Functionalities
4.2.1. The Agilex™ 3 FPGA Functionality x
4.2.1.1. The Configure Menu 4.2.1.2. The GPIO Tab 4.2.1.3. The Memory Tab 4.2.1.4. The Transceiver Tab
4.2.1.2. The GPIO Tab x
4.2.1.2.1. The LED Tab 4.2.1.2.2. The Push Button Tab 4.2.1.2.3. The I2C Bus Tab
4.2.1.3. The Memory Tab x
4.2.1.3.1. The Fabric COMP Tab 4.2.1.3.2. The HPS/Fabric COMP Tab
4.2.1.4. The Transceiver Tab x
4.2.1.4.1. The DP Tab
4.2.2. Other Functionalities x
4.2.2.1. The Bottom Information Bar
5. Development Kit Hardware and Configuration x
5.1. Configuring the FPGA and Accessing HPS Debug Access Port by JTAG 5.2. Configuring the FPGA Device by Active Serial (AS) Modes (Default Mode)
6. Custom Projects for the Development Kit x
6.1. Golden Top 6.2. EMIF Pin Swizzling Setting
A. Development Kit Components x
A.1. Board Overview and Components A.2. Input and Output Components A.3. Components and Interfaces A.4. Clock Circuits A.5. System Power A.6. Power Guidelines A.7. Power Distribution System A.8. Expansion Boards
A.1. Board Overview and Components x
A.1.1. Board Overview A.1.2. Board Components
A.2. Input and Output Components x
A.2.1. Push Buttons A.2.2. Switches A.2.3. LEDs
A.3. Components and Interfaces x
A.3.1. PCI Express* ( PCIe* ) Interface A.3.2. DisplayPort Interface A.3.3. MIPI Interface A.3.4. LPDDR4 Interfaces A.3.5. Raspberry Pi* , Pmod, and PCIe* x1 Interfaces A.3.6. HPS I/O48 Interface A.3.7. I2C
A.6. Power Guidelines x
A.6.1. Primary Mode—As a Standalone Evaluation Board A.6.2. Optional Mode—As a PCIe* Add-in Card in PCIe* Host System
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 3 FPGA and SoC C-Series Development Kits User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

A.3.5. Raspberry Pi* , Pmod, and PCIe* x1 Interfaces

The Agilex™ 3 FPGA/FPGA and SoC C-Series development board provides connections to Raspberry Pi* 4/5, Digilent Pmod*, and Altera PCIe* 3.0 x1 gold finger expansion boards via HVIO banks 5A and 5B.
Table 26.  Bank 5A Pin Assignments
Schematic Signal Name FPGA Pin Number I/O Standard Description
RPI_GPIO2 AJ24 3.3 V Raspberry Pi* GPIO2
RPI_GPIO3 AJ23 3.3 V Raspberry Pi* GPIO3
RPI_GPIO4 AH21 3.3 V Raspberry Pi* GPIO4
RPI_GPIO5 AJ19 3.3 V Raspberry Pi* GPIO5
RPI_GPIO6 AH23 3.3 V Raspberry Pi* GPIO6
RPI_GPIO7 AH22 3.3 V Raspberry Pi* GPIO7
RPI_GPIO8 AG23 3.3 V Raspberry Pi* GPIO8
RPI_GPIO9 AH20 3.3 V Raspberry Pi* GPIO9
RPI_GPIO10 AJ22 3.3 V Raspberry Pi* GPIO10
RPI_GPIO11 AJ20 3.3 V Raspberry Pi* GPIO11
RPI_GPIO12 AH18 3.3 V Raspberry Pi* GPIO12
RPI_GPIO13 AG21 3.3 V Raspberry Pi* GPIO13
RPI_GPIO14 AF24 3.3 V Raspberry Pi* GPIO14
RPI_GPIO15 AG24 3.3 V Raspberry Pi* GPIO15
RPI_GPIO16 AF23 3.3 V Raspberry Pi* GPIO16
RPI_GPIO17 AG20 3.3 V Raspberry Pi* GPIO17
RPI_GPIO18 AG19 3.3 V Raspberry Pi* GPIO18
RPI_GPIO19 AF22 3.3 V Raspberry Pi* GPIO19
RPI_ID_SD AF19 3.3 V Raspberry Pi* ID_SD
RPI_ID_SC AF21 3.3 V Raspberry Pi* ID_SC
Table 27.  Bank 5B Pin Assignments
Schematic Signal Name FPGA Pin Number I/O Standard Description
RPI_GPIO20 AK24 3.3 V / 1.8 V selectable Raspberry Pi* GPIO20 / Pmod GPIO0
RPI_GPIO21 AH26 3.3 V / 1.8 V selectable Raspberry Pi* GPIO21 / Pmod GPIO1
RPI_GPIO22 AJ25 3.3 V / 1.8 V selectable Raspberry Pi* GPIO22 / Pmod GPIO2
RPI_GPIO23 AH25 3.3 V / 1.8 V selectable Raspberry Pi* GPIO23 / Pmod GPIO3
RPI_PCIE_X1_RST_B AG26 3.3 V / 1.8 V selectable PCIe* reset
RPI_GPIO24 AE25 3.3 V / 1.8 V selectable Raspberry Pi* GPIO24 / Pmod GPIO4
RPI_GPIO25 AK25 3.3 V / 1.8 V selectable Raspberry Pi* GPIO25 / Pmod GPIO5
RPI_PCIE_X1_PWR_EN AF26 3.3 V / 1.8 V selectable Raspberry Pi* power enable
HVIO_PLL_REFCLK / RPI_GPIO26 AJ27 3.3 V / 1.8 V selectable

HVIO reference clock /

Raspberry Pi* GPIO26 / Pmod GPIO6
RPI_PCIE_X1_WAKE AH27 3.3 V / 1.8 V selectable PCIe* wake
RPI_PCIE_X1_CLKREQ_N AK19 3.3 V / 1.8 V selectable PCIe* clock request
RPI_GPIO27 AK22 3.3 V / 1.8 V selectable Raspberry Pi* GPIO27 / Pmod GPIO7
POWER_EN_MIPI_CONN_1 AJ29 3.3 V / 1.8 V selectable MIPI bank 2A power enable
LED_EN_MIPI_CONN_1 AK26 3.3 V / 1.8 V selectable MIPI bank 2A LED enable
MIPI_CONN_1_SCL AH28 3.3 V / 1.8 V selectable MIPI bank 2A I2C clock
MIPI_CONN_1_SDA AK20 3.3 V / 1.8 V selectable MIPI bank 2A I2C data
POWER_EN_MIPI_CONN_2 AF27 3.3 V / 1.8 V selectable MIPI bank 3A power enable
LED_EN_MIPI_CONN_2 AJ28 3.3 V / 1.8 V selectable MIPI bank 3A LED enable
MIPI_CONN_2_SCL AK21 3.3 V / 1.8 V selectable MIPI bank 3A I2C clock
MIPI_CONN_2_SDA AK27 3.3 V / 1.8 V selectable MIPI bank 2A I2C data
Level Two Title