GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

ID 848344
Date 8/04/2025
Public
Document Table of Contents

3.5.6. RX PMA Status Signals

Table 40.  RX PMA Status Signals
Signal Name Clocks Domain/Resets Direction Description
o_rx_is_lockedtoref[N-1:0] asynchronous output CDR lock status signal.
  • 1’b1 – CDR is frequency locked to reference clock within the PPM threshold.
  • 1’b0 – CDR is not frequency locked to reference clock within the PPM threshold. Applicable to PMA block only

When lockedtodata stays high, the lockedtoref signal status is a don't care.

o_rx_is_lockedtodata[N-1:0] asynchronous output RX CDR data lock status signal.
  • 1’b0: CDR is not in locked-to-data mode.
  • 1’b1: CDR is in locked-to-data mode. Applicable to PMA block.

When asserted, indicates that the CDR is in locked-to-data mode. When continuously asserted and does not switch between asserted and deasserted, you can confirm that the CDR is actually locked to data.

i_rx_set_locktoref[N-1:0] asynchronous input

1'b1: keep CDR in lock to reference mode.

1'b0: keep CDR in auto mode.