GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

ID 848344
Date 8/04/2025
Public
Document Table of Contents

9. Document Revision History for the GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

Document Version Quartus® Prime Version Changes
2025.08.04 25.1.1 Made the following changes:
  • Corrected Reed-Solomon FEC code word definition and clause in the Key GTS Transceiver Features table in the GTS Transceiver Overview chapter.
  • Corrected Reed-Solomon FEC code word definition and clause in the Supported FEC Modes and Compliance Specifications and FEC Direct IP Configuration Mode Support tables.
  • Added new topic, OTN, in the Protocol Support Using PMA Direct Mode section.
  • Updated the RX PMA Tuning topic in the Receiver PMA Architecture section.
  • Added new topic, RX Adaptation Mode, in the Receiver PMA Architecture section.
  • Updated the Supported FEC Modes and Compliance Specifications table in the Forward Error Correction (FEC) Architecture section.
  • Updated the Reference Clock Source Comparison table in the Reference Clock Network section.
  • Updated the PMA Primary PLL Configuration section with information about OTN.
  • Updated the I/O PLLs in HVIO Bank as System PLL topic in the System PLL section.
  • Updated the IP Overview section in the Implementing the GTS PMA/FEC Direct PHY IP chapter,
  • Updated the FEC Direct Supported Modes topic in the IP Overview section.
  • Updated the Unsupported PMA/FEC/PCS Modes section with information about OTN.
  • Updated the Configuring the GTS PMA/FEC Direct PHY IP section in the Implementing the GTS PMA/FEC Direct PHY IP chapter.
  • Updated the Direct PHY Operation Mode parameter value setting in the Mode Parameter table.
  • Added the OTN setting for the PMA configuration rules parameter for OTN support in the Common Datapath Options Parameters table.
  • Added a new section, Reconfigurable PHY Settings, with information about the Reconfigurable PHY parameter settings.
  • Corrected Reed-Solomon FEC code word definition and clause in the in the FEC Options section.
  • Removed the notes in the GTS PMA Transmitter Analog Settings and GTS PMA Receiver Analog Settings tables in the Analog Parameter Options section.
  • Updated the native mode setting description for the RX Adaptation mode parameter and added a new parameter, Selects value of RX termination mode, in the GTS PMA Receiver Analog Settings table.
  • Updated the Enable RX P&N Invert and Enable TX P&N Invert parameter descriptions in the Analog Parameter Options section.
  • Added a new section, Dynamically Reconfigurable PHY, with information about the Dynamically Reconfigurable PHY options.
  • Updated the description of the o_tx_pll_locked[N-1:0] signal in the TX and RX Reference Clock and Clock Output Interface Signals table.
  • Updated the description of the o_rx_is_lockedtoref[N-1:0] signal in the RX PMA Status Signals table.

  • Removed note about simulation support from the PMA Fractional Mode topic in the Clocking section.

  • Updated the Input Reference Clock Buffer Protection topic in the Clocking section.

  • Added new topic, Guidelines for Obtaining the Real-Time GTS TX PLL Lock Status, in the Clocking section.
  • Updated the tx_cadence_fast_clk and tx_cadence_slow_clk connections table in the Custom Cadence Generation Ports and Logic section.
  • Added new topic, Implementing PMA Direct Mode with TX Core FIFO in Elastic Configuration, in the Custom Cadence Generation Ports and Logic section.
  • Updated the TX PLL Lock Loss topic and removed the TX PLL Lock Loss Auto Recovery (Soft CSR Enabled) topic in the Asserting Reset section.
  • Removed the footnotes in the Configurable Quartus® Prime Software Settings section.
  • Added new topic, Configuring the RX Adaptation Mode and PMA Manual Tuning, with information about Auto Adaptation Mode and Manual Adaptation Mode in the Configurable Quartus® Prime Software Settings section.

  • Removed unneeded footnotes in the Direct Register Method Examples section.
  • Updated the GTS Attribute Access Data Value 1 table in the GTS Attribute Access Method section.
  • Added new topic, GTS Attribute Access Method Example 2, in the GTS Attribute Access Method section.
  • Updated the overview description for the Implementing the GTS System PLL Clocks IP section.
  • Added new sub-sections, Generating the GTS PMA/FEC Direct PHY IP Reconfigurable PHY Example Design, GTS PMA/FEC Direct PHY IP Reconfigurable PHY Example Design Functional Description, Simulating the GTS PMA/FEC Direct PHY IP Reconfigurable PHY Example Design Testbench, and Compiling the GTS PMA/FEC Direct PHY IP Reconfigurable PHY Example Design, with information about the Reconfigurable PHY example design in the GTS PMA/FEC Direct PHY IP Example Design chapter.
  • Updated the Clocking and Datapath Tool section with datapath clocking mode information.
  • Updated the IP name instances from Intel FPGA IP to IP throughout the user guide.
2025.04.07 25.1 Initial release.