GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

ID 848344
Date 8/04/2025
Public
Document Table of Contents

3.5.4. FEC Signals

Table 38.  FEC Signals
Signal Name Clocks Domain/Resets Direction Description
o_fec_status_rx_not_deskew 20 asynchronous output All RX lanes locked but the alignment markers were not unique or the skew was too large. Only applicable in multi-lane.
o_fec_status_rx_not_locked 20 asynchronous output RX lane not locked. Not locked to alignment and codeword markers or RS-FEC codewords (when not using markers). Only applicable in multi-lane.
o_fec_status_rx_not_align 20 asynchronous output Incoming signal fail, RX lanes not all locked, alignment markers not unique or skew too large. Only applicable in multi-lane.
o_fec_sf asynchronous output Signal fail, low means FEC is aligned
i_fec_snapshot asynchronous input Takes a snap of FEC status to CSR, uses Avalon® memory-mapped to read the content. Multi-lane FEC is not supported.
20 This signal is only valid for RS-FEC.