GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

ID 848344
Date 8/04/2025
Public
Document Table of Contents

2.3.2.3. CDR Block

Clocking resources in the receiver enable the clock data recovery feature. When locked, the CDR extracts the clock from the received data. The CDR supports automatic and manual lock mode.