Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 4/01/2024
Public

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3.7. Lightweight HPS-to-FPGA AXI* Initiator Interface

The Lightweight HPS-to-FPGA AXI* initiator interface, lwhps2fpga, is connected to a Mentor Graphics* AXI* initiator BFM for simulation with an instance name of lwh2f_axi4_master_inst. Platform Designer configures the BFM as shown in the following table. The BFM clock input is connected to lwhps2fpga_axi_clock clock.

Table: Configuration of Lightweight HPS-to-FPGA AXI* Subordinate BFM

Parameter Value
AXI* Address Width 20-29
AXI* Read Data Width 32
AXI* Write Data Width 32
AXI* ID Width 4

You control and monitor the AXI* initiator BFM by using the BFM API.