Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 4/01/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.5. I/O Delays

The IO Delays tab is the fourth of five tabs in the HPS component that allows you to add an optional delay chain to the input or output of any of the 48 HPS dedicated I/O pins. Each dropdown allows you to select between the following options for the corresponding I/O pin:

  • BYPASS—input or output signal bypasses the delay chain
  • CHAIN_DLY—input or output signal goes through the minimum delay chain path
  • ONE_CHAIN_DLY to THIRTY_CHAIN_DLY—input or output signal goes through between one to thirty chain delays, in addition to the minimum delay chain path
Figure 22.  Platform Designer I/O Delays Tab