AN 967: Multiple Device Synchronization in Digital Phased Array System

ID 734485
Date 12/15/2023
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A.1.2.3. Place First SYSREF Capture Register in IOE

To place the first SYSREF capture register in the IOE, set Fast Input Register On in Quartus -> Assignment Editor, shown in the following figure sysref_in is the pin name of the SYSREF in the FPGA project.
Figure 21. Fast Input Register Setting

After FPGA project compilation, you can check the result by right-clicking the SYSREF pin name and then click Locate Node->Locate in Resource and Property Viewer, as shown in the following figure.

Figure 22. Launch Resource Property Viewer

If the register is placed in the IOE successfully, the input register in the IOE is highlighted in the Resource and Property Viewer, shown in the following figure.

Figure 23. Place Input Register in IOE