AN 866: Mitigating and Debugging Single Event Upsets in Intel® Quartus® Prime Standard Edition

ID 683869
Date 9/28/2021
Document Table of Contents About the Advanced SEU Detection IP Core

Use the Advanced SEU Detection (ASD) IP core when SEU tolerance is a design concern.

You must use the EMR Unloader IP core with the ASD IP core. Therefore, if you use the ASD IP and the IP in the same design, they must share the EMR Unloader output via an Avalon® -ST splitter component. The following figure shows a Platform Designer system in which an Avalon® -ST splitter distributes the EMR contents to the ASD and IP cores.

Figure 11. Using the ASD and IP in the Same Platform Designer System