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1. Answers to Top FAQs
2. Signal Integrity Analysis with Third-Party Tools
3. Reviewing Printed Circuit Board Schematics with the Intel® Quartus® Prime Software
4. Siemens EDA PCB Design Tools Support
5. Cadence Board Design Tools Support
6. Intel Quartus Prime Pro Edition User Guide: PCB Design Tools Document Archives
A. Intel® Quartus® Prime Pro Edition User Guides
2.4.1. IBIS Model Access and Customization Flows
2.4.2. Elements of an IBIS Model
2.4.3. Customizing IBIS Models
2.4.4. Design Simulation Using the Siemens EDA HyperLynx* Software
2.4.5. Configuring LineSim to Use Intel IBIS Models
2.4.6. Integrating Intel IBIS Models into LineSim Simulations
2.4.7. Running and Interpreting LineSim Simulations
2.4.3.1. Customizing Downloaded IBIS Models for Intel® Stratix® 10 Devices, Intel® Arria® 10 Devices, and Intel® Cyclone® 10 GX Devices
2.4.3.2. Generate Custom IBIS Models with the EDA Netlist Writer GUI for Intel® Stratix® 10 Devices, Intel® Arria® 10 Devices, and Intel® Cyclone® 10 GX Devices
2.4.3.3. Customizing IBIS Model Files for Intel Agilex® 7 Devices
2.5.1. Supported Devices and Signaling
2.5.2. Accessing HSPICE Simulation Kits
2.5.3. The Double Counting Problem in HSPICE Simulations
2.5.4. HSPICE Writer Tool Flow
2.5.5. Running an HSPICE Simulation
2.5.6. Interpreting the Results of an Output Simulation
2.5.7. Interpreting the Results of an Input Simulation
2.5.8. Viewing and Interpreting Tabular Simulation Results
2.5.9. Viewing Graphical Simulation Results
2.5.10. Making Design Adjustments Based on HSPICE Simulations
2.5.11. Sample Input for I/O HSPICE Simulation Deck
2.5.12. Sample Output for I/O HSPICE Simulation Deck
2.5.13. Advanced Topics
2.5.4.1. Applying I/O Assignments
2.5.4.2. Enabling HSPICE Writer
2.5.4.3. Enabling HSPICE Writer Using Assignments
2.5.4.4. Naming Conventions for HSPICE Files
2.5.4.5. Invoking HSPICE Writer
2.5.4.6. Invoking HSPICE Writer from the Command Line
2.5.4.7. Customizing Automatically Generated HSPICE Decks
2.5.12.1. Header Comment
2.5.12.2. Simulation Conditions
2.5.12.3. Simulation Options
2.5.12.4. Constant Definition
2.5.12.5. I/O Buffer Netlist
2.5.12.6. Drive Strength
2.5.12.7. Slew Rate and Delay Chain
2.5.12.8. I/O Buffer Instantiation
2.5.12.9. Board and Trace Termination
2.5.12.10. Double-Counting Compensation Circuitry
2.5.12.11. Simulation Analysis
3.1. Reviewing Intel® Quartus® Prime Software Settings
3.2. Reviewing Device Pin-Out Information in the Fitter Report
3.3. Reviewing Compilation Error and Warning Messages
3.4. Using Additional Intel® Quartus® Prime Software Features
3.5. Using Additional Intel® Quartus® Prime Software Tools
3.6. Reviewing Printed Circuit Board Schematics with the Intel® Quartus® Prime Software Revision History
5.1. Cadence PCB Design Tools Support
5.2. Product Comparison
5.3. FPGA-to-PCB Design Flow
5.4. Setting Up the Intel® Quartus® Prime Software
5.5. FPGA-to-Board Integration with the Cadence Allegro Design Entry HDL Software
5.6. FPGA-to-Board Integration with Cadence Allegro Design Entry CIS Software
5.7. Cadence Board Design Tools Support Revision History
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4.1.2. Creating Schematic Symbols in DxDesigner
You can create schematic symbols in the DxDesigner software manually or with the Symbol wizard. The DxDesigner Symbol wizard is similar to the I/O Designer Symbol wizard, but with fewer fracturing options. The DxDesigner Symbol wizard creates, fractures, and edits FPGA symbols based on the specified Intel FPGA device. To create a symbol with the Symbol wizard, follow these steps;
- Start the DxDesigner software.
- Click Symbol Wizard in the toolbar.
- Type the new symbol name in the name field and click OK.
- Specify creation of a new symbol or modification of an existing symbol. To modify an existing symbol, specify the library path or alias, and select the existing symbol. To create a new symbol, select DxBoardLink for the symbol source. The DxDesigner block type defaults to Module because the FPGA design does not have an underlying DxDesigner schematic. Choose whether or not to fracture the symbol. Click Next.
- Type a name for the symbol, an overall part name for all the symbol fractures, and a library name for the new library created for this symbol. By default, the part and library names are the same as the symbol name. Click Next.
- Specify the appearance of the generated symbol in your DxDesigner project schematic. After making your selections. Click Next.
- In the FPGA vendor list, select Intel Quartus. In the Pin-Out file to import field, select the .pin from your Intel® Quartus® Prime project directory. You can also specify Fracturing Scheme, Bus pin, and Power pin options. Click Next.
- Select to create or modify symbol attributes for use in the DxDesigner software. Click Next.
- On the Pin Settings page, make any final adjustments to pin and label location and information. Each tabbed spreadsheet represents a fracture of your symbol. Click Save Symbol.
After creating the symbol, you can examine and place any fracture of the symbol in your schematic. You can locate separate files of all the fractures you created in the library you specified or created in the /sym directory in your DxDesigner project. You can add the symbols to your schematics or you can manually edit the symbols or with the Symbol wizard.