PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 4/10/2023
Public

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2.5.1.1. Design Example without Dynamic Reconfiguration

When the Enable dynamic reconfiguration option is not selected, the Intel® Quartus® Prime software generates a design example of PHY Lite for Parallel Interfaces IP without a dynamic reconfiguration module. This design example consists of simulation and synthesis design files.