AN 307: Intel® FPGA Design Flow for AMD* Xilinx* Users

ID 683562
Date 4/01/2024
Public
Document Table of Contents

4.1.3. Converting Registers

This table shows the nearest Intel equivalent to some common Xilinx storage primitives.

Table 41.  Nearest Intel Equivalent for Common Xilinx Storage Primitives
Xilinx Primitives Description Nearest Intel Equivalent
FDCE D Flip-Flop with Clock Enable and Asynchronous Clear dffe
FDPE D Flip-Flop with Clock Enable and Asynchronous Preset dffe
FDRE D Flip-Flop with Clock Enable and Synchronous Reset dffeas
FDSE D Flip-Flop with Clock Enable and Synchronous Set dffeas
LDCE Transparent Latch with Clock Enable and Asynchronous Clear dlatch
LDPE Transparent Latch with Clock Enable and Asynchronous Preset dlatch