Intel® Quartus® Prime Standard Edition User Guide: Partial Reconfiguration

ID 683499
Date 9/24/2018
Public
Document Table of Contents

1.12.2.1. Limitations When Using Stratix V Production Devices

These workarounds allow your design to use M20K blocks with PR.
Figure 21. Limitations for Using M20Ks in PR Regions

If you implement a M20K block in your PR region as a ROM or a RAM with initialized content, when the PR region is reconfigured, any data read from the memory blocks in static regions in columns that cross the PR region is incorrect.

If the functionality of the static region depends on any data read out from M20K RAMs in the static region, the design will malfunction.

Use one of the following workarounds, which are applicable to both AND/OR and SCRUB modes of partial reconfiguration:

  • Do not use ROMs or RAMs with initialized content inside PR regions.
  • If this is not possible for your design, you can program the memory content for M20K blocks with a .mif using the suggested workarounds.
  • Make sure your PR region extends vertically all the way through the device, in such a way that the M20K column lies entirely inside a PR region.
Figure 22. Workaround for Using M20Ks in PR Regions

This figure shows the LogicLock region extended as a rectangle reducing the area available for the static region. However, you can create non-rectangular LogicLock regions to allocate the resources required for the partition more optimally. If saving area is a concern, extend the LogicLock region to include M20K columns entirely.

Figure 23. Alternative Workaround for Using M20Ks in PR Region

Using Reserved LogicLock Regions, block all the M20K columns that are not inside a PR region, but that are in columns above or below a PR region. In this case, you may choose to under-utilize M20K resources, in order to gain ROM functionality within the PR region.

For more information including a list of the Stratix V production devices, refer to the   Errata Sheet for Stratix V Devices.

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