1.1. Terminology 1.2. An Example of a Partial Reconfiguration Design 1.3. Partial Reconfiguration Modes 1.4. Partial Reconfiguration Design Flow 1.5. Freeze Logic for PR Regions 1.6. Implementation Details for Partial Reconfiguration 1.7. Example of a Partial Reconfiguration Design with an External Host 1.8. Example Partial Reconfiguration with an Internal Host 1.9. Partial Reconfiguration Project Management 1.10. Programming Files for a Partial Reconfiguration Project 1.11. On-Chip Debug for PR Designs 1.12. Partial Reconfiguration Known Limitations 1.13. Document Revision History
188.8.131.52. Generating a .pmsf File from a .msf and .sof Input File 184.108.40.206. Generating a .rbf File from a .pmsf Input File 220.127.116.11. Create a Merged .msf File from Multiple .msf Files 18.104.22.168. Generating a Merged .pmsf File from Multiple .pmsf Files 22.214.171.124. Enable Partial Reconfiguration Bitstream Decompression when Configuring Base Design SOF file in JTAG mode 126.96.36.199. Enable Bitstream Decryption Option
1.10.2. Generate PR Programming Files with the Convert Programming Files Dialog Box
In the Intel® Quartus® Prime software, the flow to generate PR programming files is supported in the Convert Programming Files dialog box. You can specify how the Intel® Quartus® Prime software processes file types such as .msf, .pmsf, and .sof to create .rbf and merged .msf and .pmsf files.
You can create
- A .pmsf output file, from .msf and .sof input files
- A .rbf output file from a .pmsf input file
- A merged .msf file from two or more .msf input files
- A merged .pmsf file from two or more .pmsf input files
Convert Programming Files dialog box also allows you to enable the option bit for bitstream decompression during partial reconfiguration, when converting the base .sof (full design .sof) to any supported file type.