Intel® MAX™ 10 Embedded Memory User Guide

ID 683431
Date 9/17/2021
Public
Document Table of Contents

10.1. ALTMEMMULT IP Core Signals for Intel® MAX® 10 Devices

Table 33.  ALTMEMMULT IP Core Input Signals
Signal Required Description
clock Yes Clock input to the multiplier.
coeff_in[] No Coefficient input port for the multiplier. The size of the input port depends on the WIDTH_C parameter value.
data_in[] Yes Data input port to the multiplier. The size of the input port depends on the WIDTH_D parameter value.
sclr No Synchronous clear input. If unused, the default value is active high.
sel[] No Fixed coefficient selection. The size of the input port depends on the WIDTH_S parameter value.
sload_coeff No Synchronous load coefficient input port. Replaces the current selected coefficient value with the value specified in the coeff_in input.
sload_data No Synchronous load data input port. Signal that specifies new multiplication operation and cancels any existing multiplication operation. If the MAX_CLOCK_CYCLES_PER_RESULT parameter has a value of 1, the sload_data input port is ignored.
Table 34.  ALTMEMMULT IP Core Output Signals
Signal Required Description
result[] Yes Multiplier output port. The size of the input port depends on the WIDTH_R parameter value.
result_valid Yes Indicates when the output is the valid result of a complete multiplication. If the MAX_CLOCK_CYCLES_PER_RESULT parameter has a value of 1, the result_valid output port is not used.
load_done No Indicates when the new coefficient has finished loading. The load_done signal asserts when a new coefficient has finished loading. Unless the load_done signal is high, no other coefficient value can be loaded into the memory.

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