Intel® FPGA Streaming Video Protocol Specification

ID 683397
Date 5/15/2024
Document Table of Contents

3.2. Rules for IPs

To support the Intel FPGA streaming protocol, IP must meet the following guidelines:
  • IPs must be compliant to the AXI4-S protocol.
  • IPs must support the full, lite or both modes of the protocol.
  • IPs can only support the modes of the protocols as described in the Intel FPGA Streaming Video Protocol Specification.
  • If receiving an end-of-field packet with a set broken bit, IPs must also output end-of-field packets with the broken bit set, unless the IP fixes the field.
  • Full variant IPs must propagate unsupported auxiliary packets unmodified and with packet ordering unchanged.
  • Full variant IPs must process all image information and end-of-field packets and extract and use that video field information.
  • Full variant IPs must propagate any commit, timestamp, and any other auxiliary control packets, unless the auxiliary control packet’s ultimate destination is that IP.
  • Full variant IPs must set the broken bit in the outgoing end-of-field packet for any relevant fields. For example, fields break when you request a clipper IP clips all video fields down to a width of 1000 pixels, but incoming fields are of width 900 pixels.
  • Lite variant IPs exhibit undefined behavior if receiving full variant packets.

Protocol Errors

This protocol mandates no specific behaviors for IPs using the Intel FPGA streaming video protocol for handling malformed packets or protocol errors on incoming interfaces.