2.2.1. TDATA Pixel Packing
2.2.2. RGB Pixel Packing
2.2.3. YCbCr 444 Pixel Packing
2.2.4. YCbCr 422 Pixel Packing
2.2.5. YCbCr 420 Pixel Packing
2.2.6. Four-Channel Video Pixel Packing
2.2.7. Packing with Multiple Pixels in Parallel
2.2.8. Multiple Pixels in Parallel and Empty Pixels
2.2.9. YCbCr 422 Video with Multiple Pixels in Parallel
2.2.10. Packing RGB444 onto an RGB888 Interface
2.2.11. Packing with Less than 8 bits per Symbol Natively
2.2.12. Interlaced Fields
2.1.3.3. Commit Packets
Intel FPGA streaming video commit packets allow you to switch in a new set of control register values for synchronized operations such as crop and scale on an exact field basis.
Figure 14. Commit Packet
The commit packet triggers an update to a new set of control values.
When an IP receives a commit packet, it changes to any new register values at the start of the next video frame. The commit register ensures that all register updates occur simultaneously, which avoids the IP only applying some of the updated register values for the next incoming frame.
Like register update packets, the protocol does not allow commit packets between the last line of a field and an end-of-field packet. They should be in between the end of field of a previous field and the image information packet of the next field.
Refer to Legal packet ordering rules and Packet ordering examples figures in Rules for Packets.
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