Intel® FPGA Streaming Video Protocol Specification

ID 683397
Date 5/15/2024
Document Table of Contents

5. Document Revision History for Intel FPGA Streaming Video Protocol Specification

Document Version Changes
2024.05.15 Corrected 10 bit YCbCr 422 video packet 4 PIP figure title.
2024.04.15 Added Packing with Less than 8 bits per Symbol Natively and Packing RGB444 onto an RGB888 Interface
  • Corrected figures in YCbCr 422 Pixel Packing
  • Added more information to Image Information Packet IntlaceNibble table
2023.11.02 Added two new diagrams to YCbCr 422 Pixel Packing
2023.02.21 Added bits per symbol (BPS) minus 1 to Image Information Packets
2022.07.25 Added Intel FPGA Streaming Video Full-Raster Protocol
  • Deleted Intel FPGA Streaming Video Errors
  • Deleted Ready and Valid Behavior
  • Deleted Reset
  • Deleted text: the IPs also support multiple pixels in parallel
  • Added four signals to Protocol Signals
  • Changed TDATA in AXI4-Stream Handshake: TVALID and TREADY asserted at the same time
  • Renamed TDATA Format to Packing with Multiple Pixels in Parallel
  • Added Rules for Packets and Rules for IPs
  • Added Metapackets, Video Packets, Auxiliary Packets
2021.08.02 Initial release.