Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 12/12/2022
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Chroma Key Intel® FPGA IP 11. Chroma Resampler Intel® FPGA IP 12. Clipper Intel® FPGA IP 13. Clocked Video Input Intel® FPGA IP 14. Clocked Video to Full-Raster Converter Intel® FPGA IP 15. Clocked Video Output Intel® FPGA IP 16. Color Space Converter Intel® FPGA IP 17. Deinterlacer Intel® FPGA IP 18. FIR Filter Intel® FPGA IP 19. Frame Cleaner Intel® FPGA IP 20. Full-Raster to Clocked Video Converter Intel® FPGA IP 21. Full-Raster to Streaming Converter Intel® FPGA IP 22. Genlock Controller Intel® FPGA IP 23. Generic Crosspoint Intel® FPGA IP 24. Genlock Signal Router Intel® FPGA IP 25. Guard Bands Intel® FPGA IP 26. Interlacer Intel® FPGA IP 27. Mixer Intel® FPGA IP 28. Pixels in Parallel Converter Intel® FPGA IP 29. Scaler Intel® FPGA IP 30. Stream Cleaner Intel® FPGA IP 31. Switch Intel® FPGA IP 32. Tone Mapping Operator Intel® FPGA IP 33. Test Pattern Generator Intel® FPGA IP 34. Video Frame Buffer Intel® FPGA IP 35. Video Streaming FIFO Intel® FPGA IP 36. Video Timing Generator Intel® FPGA IP 37. Warp Intel® FPGA IP 38. Design Security 39. Document Revision History for Video and Vision Processing Suite User Guide

29.4. Scaler IP Registers

Each register is either read-only (RO) or read-write (RW).
Table 450.  Scaler IP RegistersIn the software API the register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_SCALER as appropriate and with an optional REG suffix
Address Register Access Description
Parameterization registers
0x0000 VID_PID RO

Read this register to retrieve scaler product ID.

This register always returns 0x6AF7_0234.

0x0004 VERSION RO

Read this register to retrieve the version information for the Intel Quartus release that Intel uses to build the scaler.

0x0008 LITE_MODE RO Read this register to determine if lite mode is on or off. This register returns 0 when you turn off lite and 1 when you turn on lite.
0x000C DEBUG_ENABLED RO Read this register to determine if debug features is on or off. This register returns 1 if reads to other registers designated as RW return the last value the IP writes to the register, or an undefined value.
0x0010 PIXELS_IN_PARALLEL RO Read this register to determine the number of pixels processed per clock cycle.
0x0014 MAX_INPUT_WIDTH RO Read this register to determine the maximum supported input field width.
0x0018 MAX_OUTPUT_WIDTH RO Read this register to determine the maximum supported output field width.
0x001C ALGORITHM RO Read this register to determine which algorithm the scaler is configured to use. Returns 0 for nearest neighbor, 1 for bilinear and 2 for polyphase.
0x0020 COEFFS_RUNTIME_LOAD RO Read this register to determine if updates to the coefficients at runtime via the Avalon memory-mapped agent interface are supported. Returns 1 if updates are supported and 0 otherwise.
0x0024 COEFF_MEM_INIT RO Read this register to determine if the scaler is configured with pre-initialized coefficients at reset. Returns 1 if the coefficients are preinitialized and 0 otherwise.
0x0028 V_SCALING_ENABLED RO Read this register to determine if the scaler is configured to support vertical scaling. Returns 1 if vertical scaling is supported and 0 otherwise.
0x002C V_NUM_TAPS RO Read this register to determine the number of vertical scaling filter taps.
0x0030 V_NUM_PHASES RO Read this register to determine the number of vertical scaling filter phases.
0x0034 V_NUM_BANKS RO Read this register to determine the number of vertical scaling filter coefficient banks.
0x0038 V_COEFFS_SIGNED RO Read this register to determine if the vertical scaling filter uses signed coefficients. Returns 1 is the coefficients are signed and 0 otherwise.
0x003C V_COEFFS_INT_BITS RO Read this register to determine the number of integer bits used to represent the vertical scaling filter coefficients.
0x0040 V_COEFFS_FRAC_BITS RO Read this register to determine the number of fraction bits that represent the vertical scaling filter coefficients.
0x0044 H_SCALING_ENABLED RO Read this register to determine if the scaler supports horizontal scaling. Returns 1 if horizontal scaling is supported and 0 otherwise.
0x0048 H_NUM_TAPS RO Read this register to determine the number of horizontal scaling filter taps.
0x004C H_NUM_PHASES RO Read this register to determine the number of horizontal scaling filter phases.
0x0050 H_NUM_BANKS RO Read this register to determine the number of horizontal scaling filter coefficient banks.
0x0054 H_COEFFS_SIGNED RO Read this register to determine if the horizontal scaling filter uses signed coefficients. Returns 1 is the coefficients are signed and 0 otherwise.
0x0058 H_COEFFS_INT_BITS RO Read this register to determine the number of integer bits to represent the horizontal scaling filter coefficients.
0x005C H_COEFFS_FRAC_BITS RO Read this register to determine the number of fraction bits to represent the horizontal scaling filter coefficients.
0x0060 to 0x0067 - - Reserved.
0x0068 V_PARTIAL_SCALING_ENABLED RO Read this register to determine if vertical partial scaling is enabled
0c006C H_PARTIAL_SCALING_ENABLED RO Read this register to determine if horizontal partial scaling is enabled
0x0070to 0x011F - - Unused.
Table 451.  Scaler IP Control and Debug RegistersFor more information, refer to Control Packets. In the software API the register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_SCALER as appropriate and with an optional REG suffix
Address Register Access Description
Lite 75 Full
0x0120 IMG_INFO_WIDTH RW RO

When you turn on lite, use this register to set the expected width of incoming video fields.

When you turn off lite and turn on Debug features, this register returns the width that the scaler derives from information in the image information packet.

When you turn on horizontal partial scaling, the value in this register specifies the number of pixels that this scaler receives in each incoming video line, including any overscan data.

0x0124 IMG_INFO_HEIGHT RW RO

When you turn on lite, use this register to set the expected height of incoming video fields.

When you turn off lite and turn on Debug features, this register returns the height that the scaler derives from information in the image information packet.

When you turn on vertical partial scaling, the value in this register specifies the number of lines that this scaler receives in each incoming frame, including any overscan data.

0x0128 IMG_INFO_INTERLACE - RO When you turn off lite and turn on Debug features, this register returns the interlace nibble that the scaler derives from information in the image information packet. Unused in lite mode.
0x012C Reserved - - Reserved
0x0130 IMG_INFO_COLORSPACE - RO When you turn off lite and turn on Debug features, this register returns the color space that the scaler derives from information in the image information packet. Unused in lite mode.
0x0134 IMG_INFO_SUBSAMPLING - RO When you turn off lite and turn on Debug features, this register returns the subsampling that the scaler derives from information in the image information packet. Unused in lite mode.
0x0138 IMG_INFO_COSITING - RO When you turn off lite and turn on Debug features, this register returns the cositing that the scaler derives from information in the image information packet. Unused in lite mode.
0x013C IMG_INFO_FIELD_COUNT - RO When you turn off lite and turn on Debug features, this register returns the field count that the scaler derives from information in the image information packet. Unused in lite mode.
0x012C to 0x013C - - - Unused.
0x0140 STATUS RO

Bit 0 : Status bit.

1 means scaler is processing a video field, 0 otherwise.

When you turn off lite:

Bit 1 : Pending register updates bit.

Any writes to the settings register (0x0148 - 0x0154) cause the IP to raise pending register updates bit, to indicate outstanding changes to the scaling settings.

The IP lowers this bit at the next field boundary after a write to the COMMIT register.

0x0144 COMMIT RW Only use when you turn off lite. The IP holds any changes to the scaling settings (not coefficients) via the register map until you issue a write to this register. The value you write is unimportant.
0x0148 OUTPUT_WIDTH RW

Write to this register to set the output field width. Unused if horizontal scaling is not enabled.

If you turn on horizontal partial scaling, the value in this register specifies the number of output pixels that this scaler produces for each line.

0x014C OUTPUT_HEIGHT RW

Write to this register to set the output field height. Unused if vertical scaling is not enabled.

If you turn on vertical partial scaling, the value in this register specifies the number of output lines that this scaler produces for each frame.

0x0150 H_BANK RW Write to this register to set the read bank for the horizontal scaling filter coefficients.
0x0154 V_BANK RW Write to this register to set the read bank for the vertical scaling filter coefficients
0x0158 TOTAL_IN_WIDTH RW Only if you turn on Horizontal partial image scaling. Write to this register to set the overall width of the tiled input frame.
0x015C TOTAL_OUT_WIDTH RW Only if you turn on Horizontal partial image scaling. Write to this register to set the overall width of the tiled output frame.
0x0160 H_POS_ERROR RW

Only if you turn on Horizontal partial image scaling. Write to this register to set the horizontal sub-pixel offset. If o s is the index of the first output pixel within the complete output frame that this scaler should produce, the horizontal sub-pixel offset is calculated as:

0x0164 H_PHASE_OFFSET RW

Only if you turn on Horizontal partial image scaling. Write to this register to set the horizontal phase offset. If o s is the index of the first output pixel within the complete output frame that this scaler should produce, the horizontal phase offset is calculated as:

0x0168 H_PHASE_ERROR RW

Only if you turn on Horizontal partial image scaling. Write to this register to set the horizontal sub-phase offset. If o s is the index of the first output pixel within the complete output frame that this scaler should produce, the horizontal sub-phase offset is calculated as:

0x016C H_EXTENDED_FILL RW Only if you turn on Horizontal partial image scaling. Write to this register to enable the left edge overscan feature. Write 1 to bit 0 to enable overscan, or 0 to bit 0 to disable overscan
0x0170 TOTAL_IN_HEIGHT RW Only if you turn on Vertical partial image scaling. Write to this register to set the overall height of the tiled input frame ().
0x0174 TOTAL_OUT_HEIGHT RW Only if you turn on Vertical partial image scaling. Write to this register to set the overall height of the tiled output frame ().
0x0178 V_POS_ERROR RW

Only if you turn on Vertical partial image scaling. Write to this register to set the vertical sub-pixel offset. If o s is the index of the first output line within the complete output frame that this scaler should produce, the vertical sub-pixel offset is calculated as:

0x017C V_PHASE_OFFSET RW

Only if you turn on Vertical partial image scaling. Write to this register to set the vertical phase offset. If o s is the index of the first output line within the complete output frame that this scaler should produce, the vertical phase offset is calculated as:

0x0180 V_PHASE_ERROR RW

Only if you turn on Vertical partial image scaling. Write to this register to set the vertical sub-phase offset. If o s is the index of the first output line within the complete output frame that this scaler should produce, then the vertical sub-phase offset is calculated as:

0x0184 V_EXTENDED_FILL RW Only if you turn on Vertical partial image scaling. Write to this register to enable the top edge overscan feature. Write 1 to bit 0 to enable overscan, or 0 to bit 0 to disable overscan
0x0188 to 0x01FC - - Unused.
0x0200 RT_COEFF_LOAD_BANK_SELECT WO Write to this register to set the index of the scaling filter coefficient bank that is being updated
0x0204 RT_COEFF_LOAD_PHASE_SELECT WO Write to this register to set the index of the scaling filter phase that you are updating
0x0208 RT_COEFF_LOAD_COMMIT WO Write 1 to this register to commit the coefficient information in the RT_COEFF_LOAD_TAP_X registers to the horizontal scaling filter coefficient bank and phase specified in RT_COEFF_LOAD_BANK_SELECT and RT_COEFF_LOAD_PHASE_SELECT respectively. Write 0 to this register to commit the coefficient information in the RT_COEFF_LOAD_TAP_X registers to the vertical scaling filter coefficient bank and phase specified in RT_COEFF_LOAD_BANK_SELECT and RT_COEFF_LOAD_PHASE_SELECT respectively.
0x020C-0x0308 RT_COEFF_LOAD_TAP_0 - RT_COEFF_LOAD_TAP_63 WO Up to 64 registers to set the new coefficient values for a vertical or horizontal scaling filter phase. If the vertical scaling filter has N taps, only the first N registers need to update before writing to the RT_COEFF_LOAD_COMMIT register. If the horizontal scaling filter has M taps, only the first M registers need to update before writing to the RT_COEFF_LOAD_COMMIT register.

Register Bit Descriptions

Table 452.  VID_PID
Name Bits Description
Scaler version ID and product ID 31:0 This register always returns 0x0000_0234.
  • 15:0 is the product ID and always returns 0x0234
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 453.  VERSION
Name Bits Description
Lite mode parameterization bit 7:0 Register map version. This returns 0x01.
QPDS patch revision 15:8 Returns 0x00 .
QPDS update revision 23:16 Updated for each release. For 214, returns 0x04 .
QPDS major revision 31:24 Updated for each release. For 21.4, returns 0x15.
Table 454.  LITE_MODE
Name Bits Description
Lite mode parameterization bit 31:0 Returns 1 if lite mode is on and 0 otherwise.
Table 455.  DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 31:0 Returns 1 if debug features is on and 0 otherwise.
Table 456.  PIXELS_IN_PARALLEL
Name Bits Description
Pixels in parallel 31:0 Number of pixels processed per clock cycle.
Table 457.  MAX_INPUT_WIDTH
Name Bits Description
Maximum input width 31:0 Maximum supported input field width.
Table 458.  MAX_OUTPUT_WIDTH
Name Bits Description
Maximum output width 31:0 Maximum supported output field width.
Table 459.  ALGORITHM
Name Bits Description
Algorithm 31:0 Returns 0 for nearest neighbor, 1 for bilinear and 2 for polyphase.
Table 460.   COEFFS_RUNTIME_LOAD
Name Bits Description
Runtime load 31:0 Returns 1 if Runtime coefficient updates is on and 0 otherwise. Only valid for polyphase.
Table 461.   COEFF_MEM_INIT
Name Bits Description
Coefficient memory initialized 31:0 Returns 1 if the scaling filter coefficient memory is preinitialized at reset and 0 otherwise. Only valid for polyphase.
Table 462.   V_SCALING_ENABLED
Name Bits Description
Vertical scaling enabled 31:0 Returns 1 if Enable vertical scaling is on and 0 otherwise
Table 463.   V_NUM_TAPS
Name Bits Description
Vertical scaling filter taps 31:0 Returns the number of vertical scaling filter taps.
Table 464.   V_NUM_PHASES
Name Bits Description
Vertical scaling filter phases 31:0 Returns the number of vertical scaling filter phases. Only valid for polyphase.
Table 465.   V_NUM_BANKS
Name Bits Description
Vertical scaling filter coefficient banks 31:0 Returns the number of vertical scaling filter coefficient banks. Only valid if polyphase scaling is selected.
Table 466.   V_COEFFS_SIGNED
Name Bits Description
Vertical scaling filter coefficients signed 31:0 Returns 1 if the vertical scaling filter coefficients are signed values and 0 otherwise. Only valid for polyphase.
Table 467.   V_COEFFS_INT_BITS
Name Bits Description
Vertical scaling filter coefficients integer bits 31:0 Returns the number of integer bits used to represent the vertical scaling filter coefficients. Only valid for polyphase.
Table 468.   V_COEFFS_FRAC_BITS
Name Bits Description
Vertical scaling filter coefficients fraction bits 31:0 Returns the number of fraction bits to represent the vertical scaling filter coefficients. Only valid for polyphase.
Table 469.   H_SCALING_ENABLED
Name Bits Description
Horizontal scaling enabled 31:0 Returns 1 if horizontal scaling is enabled and 0 otherwise.
Table 470.  H_NUM_TAPS
Name Bits Description
Horizontal scaling filter taps 31:0 Returns the number of horizontal scaling filter taps.
Table 471.   H_NUM_PHASES
Name Bits Description
Horizontal scaling filter phases 31:0 Returns the number of horizontal scaling filter phases. Only valid for polyphase.
Table 472.   H_NUM_BANKS
Name Bits Description
Horizontal scaling filter coefficient banks 31:0 Returns the number of horizontal scaling filter coefficient banks. Only valid for polyphase.
Table 473.   H_COEFFS_SIGNED
Name Bits Description
Horizontal scaling filter coefficients signed 31:0 Returns 1 if the horizontal scaling filter coefficients are signed values and 0 otherwise. Only valid for polyphase.
Table 474.   H_COEFFS_INT_BITS
Name Bits Description
Horizontal scaling filter coefficients integer bits 31:0 Returns the number of integer bits to represent the horizontal scaling filter coefficients. Only valid for polyphase.
Table 475.   H_COEFFS_FRAC_BITS
Name Bits Description
Horizontal scaling filter coefficients fraction bits 31:0 Returns the number of fraction bits to represent the horizontal scaling filter coefficients. Only valid for polyphase.
Table 476.  V_PARTIAL_SCALING_ENABLED
Name Bits Description
Vertical partial image scaling enabled 31:0 Returns 1 if you turn on vertical partial image scaling and 0 otherwise
Table 477.   H_PARTIAL_SCALING_ENABLED
Name Bits Description
Horizontal partial image scaling enabled 31:0 Returns 1 if you turn on horizontal partial image scaling and 0 otherwise
Table 478.   IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When lite mode is on, write to this register to set the expected width of the incoming video fields.

For full parameterizations with debug features enabled, this register returns the width-1 field from the most recently received image information packet and adds 1 to return a value for width.

unused 31:16 Unused.
Table 479.   IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0

When lite mode is on, write to this register to set the expected height of the incoming video fields.

For full parameterizations with debug features enabled, this register reads the height-1 field from the most recently received image information packet and adds 1 to return a value for height.

unused 31:16 Unused.
Table 480.  IMG_INFO_INTERLACE
Name Bits Description
IntlaceNibble bits 3:0

When lite mode is on, this register has no function.

When lite mode is off with debug features on, this register returns the intlaceNibble field from the most recently received image information packet .

unused 31:4 Unused.
Table 481.  IMG_INFO_COLORSPACE
Name Bits Description
CSP code bits 6:0

When lite mode is on, this register has no function.

When lite mode is off with debug features on, this register returns the 7 bit CSP field from the most recently received image information packet .

unused 31:7 Unused.
Table 482.  IMG_INFO_SUBSAMPLING
Name Bits Description
SubSa code bits 1:0

When lite mode is on, this register has no function.

When lite mode is off with debug features on, this register returns the SUBSA field from the most recently received image information packet.

unused 31:2 Unused.
Table 483.  IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When lite mode is on, this register has no function.

When lite mode is off with debug features on,, this register returns the COSITE field from the most recently received image information packet.

unused 31:2 Unused.
Table 484.  IMG_INFO_FIELD_COUNT
Name Bits Description
Count bits 6:0

When lite mode is on, this register has no function.

When lite mode is off with debug features on,, this register returns the 7 bit FIELD_COUNT field from the most recently received image information packet.

unused 31:7 Unused.
Table 485.  STATUS
Name Bits Description
Status bit 0 1 means scaler is processing a video field, 0 otherwise.
Pending register updates bit 1 1 means scaler has pending updates, 0 otherwise
unused 31:2 Unused.
Table 486.  COMMIT
Name Bits Description
unused 31:0 Unused.
Table 487.  OUTPUT_WIDTH
Name Bits Description
Output width 15:0 Output field width
unused 31:16 Unused.
Table 488.  OUTPUT_HEIGHT
Name Bits Description
Output height 15:0 Output field height
unused 31:16 Unused.
Table 489.  H_BANK
Name Bits Description
Horizontal scaling filter coefficient read bank 3:0 Horizontal scaling filter coefficient read bank.
unused 31:4 Unused.
Table 490.  V_BANK
Name Bits Description
Vertical scaling filter coefficient read bank 3:0 Vertical scaling filter coefficient read bank.
unused 31:4 Unused.
Table 491.  TOTAL_IN_WIDTH
Name Bits Description
Total input frame width 15:0 Width of the complete, tiled input frame (only used if Horizontal partial image scaling is turned on)
Unused 31:4 Unused.
Table 492.  TOTAL_OUT_WIDTH
Name Bits Description
Total output frame width 15:0 Width of the complete, tiled output frame (only used if Horizontal partial image scaling is turned on)
Unused 31:4 Unused.
Table 493.  H_POS_ERROR
Name Bits Description
Horizontal sub-pixel offset 15:0 Horizontal subpixel offset (only used if Horizontal partial image scaling is turned on)
Unused 31:4 Unused.
Table 494.  H_PHASE_OFFSET
Name Bits Description
Horizontal phase offset 15:0 Horizontal phase offset (only used if Horizontal partial image scaling is turned on)
Unused 31:4 Unused.
Table 495.  H_PHASE_ERROR
Name Bits Description
Horizontal sub-phase offset 15:0 Horizontal subphase offset (only used if Horizontal partial image scaling is turned on)
Unused 31:4 Unused.
Table 496.  H_EXTENDED_FILL
Name Bits Description
Enable horizontal left edge overscan 0 Enable horizontal left edge overscan (only used if Horizontal partial image scaling is turned on)
Unused 31:1 Unused.
Table 497.  TOTAL_IN_HEIGHT
Name Bits Description
Total input frame height 15:0 Height of the complete, tiled input frame (only used if Vertical partial image scaling is turned on)
Unused 31:4 Unused.
Table 498.  TOTAL_OUT_HEIGHT
Name Bits Description
Total output frame height 15:0 Height of the complete, tiled output frame (only used if Vertical partial image scaling is turned on)
Unused 31:16 Unused.
Table 499.  V_POS_ERROR
Name Bits Description
Vertical sub-pixel offset 15:0 Vertical subpixel offset (only used if Vertical partial image scaling is turned on)
Unused 31:16 Unused.
Table 500.  V_PHASE_OFFSET
Name Bits Description
Vertical phase offset 15:0 Vertical phase offset (only used if Vertical partial image scaling is turned on)
Unused 31:16 Unused.
Table 501.  V_PHASE_ERROR
Name Bits Description
Vertical sub-phase offset 15:0 Vertical subphase offset (only used if Vertical partial image scaling is turned on)
Unused 31:16 Unused.
Table 502.  V_EXTENDED_FILL
Name Bits Description
Enable vertical top edge overscan 0 Enable vertical top edge overscan (only used if Vertical partial image scaling is turned on)
Unused 31:1 Unused.
Table 503.  RT_COEFF_LOAD_BANK_SELECT
Name Bits Description
Coefficient write bank 3:0 Index of coefficient bank to be updated
unused 31:4 Unused.
Table 504.  RT_COEFF_LOAD_PHASE_SELECT
Name Bits Description
Coefficient write phase 7:0 Index of coefficient phase to be updated
unused 31:8 Unused.
Table 505.  RT_COEFF_LOAD_COMMIT
Name Bits Description
unused 31:0 Unused.
Table 506.  RT_COEFF_LOAD_TAP_X
Name Bits Description
Coefficient value coeff_width-1:0 Coefficient value for filter tap X
unused 31:coeff_width Unused.
75

When you turn on lite mode, registers are RW only if you turn on Debug features, otherwise they are WO. For full, turn off lite mode.