DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/18/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Give Feedback

6.6.1. Controller Interface

The controller interface allows you to control the sink from an external or on-chip controller, such as the Nios II processor for debugging. The controller interface is an Avalon-MM slave that also allows access to the sink’s internal status registers.

The sink asserts the rx_mgmt_irq port when issuing an interrupt to the controller.

Note: The controller interface is not available if you turned off the Enable GPU Control parameter.