DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/18/2023
Public

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10.10.2.18. VIDEO_MODE_F0_VERTICAL_RISING (0x62)

Table 153.  VIDEO_MODE_F0_VERTICAL_RISING (0x62)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
F0 vertical rising 15:0 RW Specifies the line number given to the start of field 0's vertical blanking. 0x0