DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/18/2023
Public

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Document Table of Contents

10.2.2. DPTX0_MSA_NVID

Address: 0x0021

Direction: RO

Reset: 0x00000000

Table 66.  DPTX0_MSA_NVID Bits

Bit

Bit Name

Function

31:24

Unused

23:0

NVID/VFREQ[47:24]

8B/10B Channel Coding:

Main stream attribute NVID

128B/132B Channel Coding:

Main stream attribute VFREQ[47:24]