AN 584: Timing Closure Methodology for Advanced FPGA Designs

ID 683145
Date 10/08/2021
Public
Document Table of Contents

1.8. Document Revision History for AN 584: Timing Closure Methodology for Advanced FPGA Designs

Document Version Intel® Quartus® Prime Version Changes
2021.10.08 21.3
  • Heavily revised document throughout to update for latest Intel document style, legal, and formatting conventions.
  • Revised the order of topics and grouped related items.
  • Revised headings for precision and clarity.
  • Updated all figures.
  • First version to include an HTML publication of the document.
2014.12.19 14.1
  • Updated product name for DSE II.
2009.08.28 9.0
  • Initial release.