1. Introduction to the Avalon® Interface Specifications
2. Avalon® Clock and Reset Interfaces
3. Avalon® Memory-Mapped Interfaces
4. Avalon® Interrupt Interfaces
5. Avalon® Streaming Interfaces
6. Avalon® Streaming Credit Interfaces
7. Avalon® Conduit Interfaces
8. Avalon® Tristate Conduit Interface
A. Deprecated Signals
B. Document Revision History for the Avalon® Interface Specifications
2.1. Avalon® Clock Sink Signal Roles
2.2. Clock Sink Properties
2.3. Associated Clock Interfaces
2.4. Avalon® Clock Source Signal Roles
2.5. Clock Source Properties
2.6. Reset Sink
2.7. Reset Sink Interface Properties
2.8. Associated Reset Interfaces
2.9. Reset Source
2.10. Reset Source Interface Properties
5.1. Terms and Concepts
5.2. Avalon® Streaming Interface Signal Roles
5.3. Signal Sequencing and Timing
5.4. Avalon® -ST Interface Properties
5.5. Typical Data Transfers
5.6. Signal Details
5.7. Data Layout
5.8. Data Transfer without Backpressure
5.9. Data Transfer with Backpressure
5.10. Packet Data Transfers
5.11. Signal Details
5.12. Protocol Details
3.5.2.3. waitrequestAllowance Equals Two - Not Recommended
The following diagram illustrates timing for an Avalon® -MM host that can send two transfers after waitrequest is asserted.
This timing is legal, but not recommended. In this example the host counts the number of transactions instead of the number of clock cycles. This approach requires a counter that makes the implementation more complex and may affect timing closure. When the host determines when to drive transactions with the waitrequest signal and a constant number of cycles, the host starts or stops transactions based on the registered signals.
Figure 10. waitrequestAllowance Equals Two Transfers
The numbers in this figure mark the following events:
- The Avalon® -MM host asserts write and drives data.
- The Avalon® -MM agent asserts waitrequest.
- The Avalon® -MM host drives write and data. Because the waitrequestAllowance is 2, the host drives data in 2 consecutive cycles.
- The Avalon® -MM host deasserts write because the host has spent the 2-transfer waitrequestAllowance.
- The Avalon® -MM host issues a write as soon as waitrequest is deasserted.
- The Avalon® -MM host drives write and data. The agent asserts waitrequest for 1 cycle.
- In response to waitrequest, the Avalon® -MM host holds data for 2 cycles.