2.1.9. Double Accumulation Register for Fixed-point Arithmetic
The accumulator supports double accumulation by enabling the 64-bit double accumulation registers located between the output register bank and the accumulator feedback path.
If the double accumulation register is enabled, an extra clock cycle delay is added into the feedback path of the accumulator.
This register has the same settings as the output register bank.
By enabling this register, you can have two accumulator channels using the same number of variable precision DSP block. This is useful when processing interleaved complex data (I, Q).