Intel Agilex® 7 Variable Precision DSP Blocks User Guide

ID 683037
Date 4/11/2023
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5.6.4. 18 × 18 Plus 36 Mode Signals

Figure 54. 18 × 18 Plus 36 Mode Signals


Table 67.  Data Input and Output Signals
Signal Name Type Width Description
ax[17:0] Input 18 Input data bus to top multiplier.

This signal is not available when internal coefficient feature is enabled.

ay[18:0] Input 19 Input data bus to top multiplier.

When pre-adder is enabled, these signals are served as input to the top pre-adder.

bx[17:0] Input 18 Input data bus to bottom multiplier.
resulta[63:0] Output 37 Output data bus from top multiplier.
Table 68.  Clock, Enable, and Clear Signals
Signal Name Type Width Description
clk[0] Input 1 Input clock for all registers.
ena[2:0] Input 3 Clock enable signals for all registers.

These signals are active-High.

clr[1:0] Input 2 These signals can be asynchronous or synchronous clear input signals for all registers. You may select the type of clear input signal using Type of clear signal parameter.

These signals are active-High.

By default, this signal is low.

For more information about clock enable restrictions for input registers, refer to the related information.

Table 69.  Dynamic Control SignalsFor a summary of supported dynamic control features for each operational mode, refer to the related information.
Signal Name Type Width Description
disable_chainout Input 1 Dynamic input signal to enable dynamic chainout feature. You can change the value of this signal during run-time.

You must connect the chainout output bus to the next DSP block in order to use this signal.

  • 0: Send the chainout output to the next DSP block. Default value.
  • 1: Do not send the chainout output to the next DSP block. The chainout output is all zero.
accumulate Input 1 Input signal to enable or disable the accumulator feature. You can change the value of this signal during run-time.
  • 0: Generate the current result without accumulating the previous result. Default value.
  • 1: Add the current result to the previous result.
loadconst Input 1 Input signal to enable or disable the load constant feature. You can change the value of this signal during run-time.
  • 0: Disable the load constant feature. Default value.
  • 1: Add a preload constant to the result to perform a biased rounding.
sub Input 1 Dynamic input signal to control the operation of the adder module. You can change the value of this signal during run-time.
  • 0: Add the output of the top multiplier with the output of the bottom multiplier. Default value.
  • 1: Subtract the output of the top multiplier from the output of the bottom multiplier.
negate Input 1 Dynamic input signal to control the operation of the chainout adder module. You can change the value of this signal during run-time.
  • 0: Add the sum of the top and bottom multipliers with the chainin data input bus and accumulate loopback data. Default value.
  • 1: Subtract the sum of the top and bottom multipliers from the chainin data input bus and accumulate loopback data.
Table 70.  Output Cascade Signals
Signal Name Type Width Description
chainin[63:0] Input 64 Input data bus for output cascade module.

Connect these signals to the chainout signals from the preceding DSP core.

chainout[63:0] Output 64 Output data bus of the output cascade module.

Connect these signals to the chainin signals of the next DSP core.