Intel® Stratix® 10 FPGA Developer Center

The FPGA Developer Center is organized into industry-standard stages, which provides you with various resources to complete your Intel® FPGA design. Each design step is detailed in the expandable sub-sections with links that allow you to select and move between the various Generation 10 device series.

1. Device Information

Documentation

2. Interface Protocol

Documentation

3. Design Planning

Documentation

4. Design Entry

Documentation

The Intel® Quartus® Prime Pro Edition software offers a mature synthesizer that allows you to enter your designs with maximum flexibility. If you are new to these languages, you can use online examples or built-in templates to get you started.

Verilog

VHDL

The Intel Quartus Prime Pro Edition software offers Verilog and VHDL templates of frequently used structures. For more information on using these templates, refer to the "Using Provided HDL Templates" section of the Intel Quartus Prime Pro Handbook.

The Intel® Quartus® Prime design software also comes with Intel® High Level Synthesis Compiler which synthesizes a C++ function into an RTL implementation that is optimized for Intel® FPGA products.

5. Simulation and Verification

Documentation

6. Implementation and Optimization

Documentation

7. Timing Analysis

Documentation

8. On-Chip Debug

Documentation

Explore Other Developer Centers

For other design guidelines, visit the following Developer Centers: