DSP Builder for Intel® FPGAs

Overview

DSP Builder for Intel® FPGAs is a digital signal processing (DSP) design tool that enables Hardware Description Language (HDL) generation of DSP algorithms directly from the MathWorks Simulink environment onto Intel® FPGAs.

The tool generates high quality, synthesizable VHDL/Verilog code from MATLAB functions, and Simulink models.
The generated Register Transfer Level (RTL) code can be used for Intel® FPGA programming.
DSP Builder for Intel® FPGAs is widely used in radar designs, wireless and wireline communication designs, medical imaging, and motor control applications.

Features

DSP Builder for Intel® FPGAs enables the implementation of DSP designs with high performance and productivity benefits. Here are some highlighted features:

Import RTL into your MathWorks MATLAB/Simulink environment for co-simulation and code generation.
Go from high-level schematic to low-level optimized VHDL targeted for Intel® FPGAs.
Perform high-performance fixed- and floating-point digital signal processing (DSP) with vector processing, such as complex IEEE 754 single-precision floating point.
Perform push-button design migration to Intel's hard floating-point DSP block in Intel® Arria® 10 and Intel® Stratix® 10 devices.
Build custom arithmetic logic unit (ALU) processor architectures from a flat data-rate design with ALU folding.
Perform high-level synthesis optimizations, auto-pipeline insertion and balancing, and targeted hardware mapping.
Build custom fast Fourier transform (FFT) algorithms using a flexible ‘white-box’ fast Fourier transform (FFT) toolkit with an open hierarchy of libraries and blocks.
Use a designer-specified system clock constraint to automatically pipeline, time-division multiplex/fold, and close timing.
Access advanced math.h functions and multichannel data.
Generate resource utilization tables for all designs without a Intel® Quartus® Prime Software compile.
Automatically generate projects or scripts for the Intel® Quartus® Prime Software, Timing Analyzer, Platform Designer (formerly Qsys), and ModelSim*-Intel® FPGA Edition.

Getting Started

Required order of installation:
1. Intel® Quartus® Prime Software
2. MathWorks
3. DSP Builder for Intel® FPGAs
Download Pro Edition to target the latest Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 GX devices.
Download Standard Edition to target Intel® Arria® 10, Stratix® V, Cyclone® V, Intel® Cyclone® 10 LP, and Intel® MAX® 10 devices.
Additional MATLAB and DSP Builder licenses are required.
Learn how to add your DSP Builder license to your MATLAB installation.