BSDL Support
Intel provides boundary-scan description language (BSDL) files for IEEE Standard 1149.1, IEEE Standard 1149.6 and IEEE Standard 1532 specifications. BSDL files provide a syntax that allows the device to run boundary-scan test (BST) and in-system programmability (ISP). The IEEE 1149.1 BSDL files available on this website are used for pre-configuration BST. If you want to perform BST after configuration, you can select the appropriate generation tools and guidelines for the post-configuration BSDL generation in Table 1.
Table 1. BSDL File Generation Tools and Guidelines
Tools or Guidelines |
FPGA |
CPLD |
Configuration Devices |
|---|---|---|---|
| Post-configuration BSDL generator | Intel Agilex® 7 | - | |
Stratix®, Stratix® GX, Stratix® II, Stratix® II GX, Stratix® III |
MAX® 3000, MAX® 7000, MAX® II |
EPC |
|
Stratix® IV, Stratix® V |
MAX® V |
- |
|
- |
MAX V |
- |
|
Intel® Stratix® 10 |
- |
- |
|
Intel® Arria® 10 |
- |
- |
|
Intel® MAX® 10 |
- |
- |
|
Intel® Cyclone® 10 LP, Intel® Cyclone® 10 GX |
- |
- |
Related Documents
- AN 39: IEEE 1149.1 (JTAG) boundary-scan testing in Intel® FPGA devices
- IEEE 1149.1 (JTAG) boundary-scan testing for MAX II devices
- JTAG and in-system programmability in MAX V devices
- IEEE 1149.1 (JTAG) boundary scan testing for Cyclone II devices
- IEEE 1149.1 (JTAG) boundary scan testing in Stratix II and Stratix II GX devices
- IEEE 1149.1 (JTAG) boundary scan testing in Stratix III devices
- JTAG boundary scan testing in Stratix IV devices
- IEEE 1149.1 (JTAG) boundary scan testing for Cyclone III devices
- IEEE 1149.1 (JTAG) boundary scan testing for Arria GX devices
- JTAG boundary scan testing in Arria II devices
- MorphIO: An I/O reconfiguration solution for Intel FPGA devices white paper
Explore Other Developer Centers
For other design guidelines, visit the following Developer Centers:
- Board Developer Center - Contains detailed guidelines and considerations for high-speed PCB designs with Intel® FPGAs and SoC FPGAs.
- Embedded Software Developer Center - Contains guidance on how to design in an embedded environment with SoC FPGAs.
- FPGA Developer Center - Contains resources to complete your Intel® FPGA design.