Intel® FPGA Design Examples
Intel® design examples provide efficient solutions for common design challenges. These designs can be used as a starting point for developing with your unique system and are available using many functions such as filters, arithmetic functions, error detection/correction, modulation/demodulation, and video and image processing.
Design examples are also available in the Design Store for Intel® FPGAs and RocketBoards.org.
9/7/2023
MAX II Design Examples | Intel
MAX II and MAX CPLD Design Examples demonstrate various features of the MAX II and MAX low-power CPLD families using Quartus II or MAX+PLUS II software.
In digital up-conversion, baseband signals are interpolated to intermediate frequency (IF), then digitally modulated by IF sinusoidal carriers. Learn more from Intel.
Intel Design Entry/Tool Examples provide efficient solutions for common design challenges
Search Intel's content collection of development guides, training, software downloads and software kits for FPGA SDK for OpenCL.
Learn more about how to run a simulation with the Quartus II NativeLink feature using the following two steps in this example from the Intel Support team.
OpenCL Mandelbrot Fractal Algorithm example provides a kernel that implements the Mandelbrot fractal algorithm as well as a host application that displays the results to the screen.
Learn in this overview how to use the Intel Arria II GX Triple-Rate SDI reference design to accelerate the implementation of broadcast studio equipment.
Learn in this overview how the Digital Blocks TFT LCD Controller reference design enables you to accelerate the design-in of TFT LCD panel displays in your system.
Discover how this video and image processing design example shows how the cores provided in the Video and Image Processing Suite can be used to create a complete video system.
The Intel drive-on-a-chip motor control reference design is an integrated drive system on a single Cyclone V SoC or Intel MAX 10. Learn more in this guide.
Discover download files, system requirements, and support information for the FPGA Design Security Solution Using a Secure Memory Device reference design.
Follow this guide to learn how the automotive digital radar reference design quickly develops and verifies hardware accelerators using our advanced development tools.