Intel® FPGA Design Examples

The objective of this example is to showcase the way to constraint the TSE_RGMII. It can run on 3 different speeds which are 10 MHz, 100 MHz, and 1000 MHz.

OpenCL Mandelbrot Fractal Algorithm example provides a kernel that implements the Mandelbrot fractal algorithm as well as a host application that displays the results to the screen.

Intel® FPGA design examples provide efficient solutions for common design challenges.

This page contains download files, system requirements, and features for the Analog Device Incorporated (ADI) Parallel Port SDRAM Controller Reference Design.

Learn in this overview how to use the Intel Arria II GX Triple-Rate SDI reference design to accelerate the implementation of broadcast studio equipment.

Learn in this overview how the Digital Blocks TFT LCD Controller reference design enables you to accelerate the design-in of TFT LCD panel displays in your system.

Discover how this video and image processing design example shows how the cores provided in the Video and Image Processing Suite can be used to create a complete video system.

The Intel drive-on-a-chip motor control reference design is an integrated drive system on a single Cyclone V SoC or Intel MAX 10. Learn more in this guide.

Follow this guide to learn how the automotive digital radar reference design quickly develops and verifies hardware accelerators using our advanced development tools.

Discover download files, system requirements and features for the Serial RapidIO to TI 6482 DSP reference design in this guide from the Intel support team.

Discover download files, system requirements, and support information for the Serial RapidIO (SRIO) Interoperability with TI DSP 6482 reference design.

In this timing analyzer example from the Intel Support team, learn how to use the set_multicycle_path command to specify the multicycle constraints in the design.