Platform Designer (formerly Qsys) Support

The Qsys system integration tool in Quartus^® Prime software saves time and effort in the FPGA design process by enabling faster system development and design reuse. Qsys automatically generates interconnect logic to connect intellectual property (IP) functions and subsystems. Qsys replaces the SOPC Builder tool for new designs.

For an overview of Qsys features, refer to the Qsys product page.

Qsys Documentation

System Design with Qsys section in the Quartus Prime handbook:

Interface Standard Specifications

Avalon^® Interface Specifications
AMBA^® 3 AXI^™ Protocol Specification on the ARM^® website

Verification IP and Bus Functional Models (BFMs)

Tutorials and Training

Qsys webcasts and demonstration videos:
Short videos to learn about using Qsys
The Quartus II Software Interactive Tutorial:
Online course with 20-minute Create a Qsys System demonstration
Introduction to Qsys: 1.5-hour online course
Advanced System Design Using Qsys: 1-hour online course
Qsys Custom Components: 1.5-hour online course
Qsys Tutorial Design Example:
Step-by-step procedures and design example files to create and verify a system
Search for Qsys instructor-led or virtual classroom classes: 2-day classroom training available

Designs and IP

Migration Guidelines and Known Issues