1.5. Simulation with HSPICE Models
By their nature, HSPICE decks are highly customizable and require a detailed description of the circuit under simulation. For devices that support advanced I/O timing, when Enable Advanced I/O Timing is turned on, the HSPICE decks generated by the Intel® Quartus® Prime HSPICE Writer automatically include board components and topology defined in the Board Trace Model. Configure the board components and topology in the Pin Planner or in the Board Trace Model tab of the Device and Pin Options dialog box. All HSPICE decks generated by the Intel® Quartus® Prime software include compensation for the double count problem. You can simulate with the default simulation parameters built in to the generated HSPICE decks or make adjustments to customize your simulation.
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