Intel® Quartus® Prime Pro Edition User Guide: PCB Design Tools

ID 683768
Date 11/04/2020
Public
Document Table of Contents

1.1.1. Signal Integrity Simulations with HSPICE and IBIS Models

The Intel® Quartus® Prime software can export accurate HSPICE models with the built-in HSPICE Writer. You can run signal integrity simulations with these complete HSPICE models in Synopsys* HSPICE. IBIS models of the FPGA I/O buffers are also created easily with the Intel® Quartus® Prime IBIS Writer.

You can run signal integrity simulations with these complete HSPICE models in Synopsys* HSPICE.

You can integrate IBIS models into any third-party simulation tool that supports them, such as the Mentor Graphics* HyperLynx* software. With the ability to create industry-standard model definition files quickly, you can build accurate simulations that can provide data to help improve board-level signal integrity.

The I/O’s IBIS and HSPICE model creation available in the Intel® Quartus® Prime software can help prevent problems before a costly board respin is required. In general, creating and running accurate simulations is difficult and time consuming. The tools in the Intel® Quartus® Prime software automate the I/O model setup and creation process by configuring the models specifically for your design. With these tools, you can set up and run accurate simulations quickly and acquire data that helps guide your FPGA and board design.

For a more information about SSN and ways to prevent it, refer to AN 315: Guidelines for Designing High-Speed FPGA PCBs.

For information about basic signal integrity concepts and signal integrity details pertaining to Intel FPGA devices, visit the Intel Signal & Power Integrity Center.

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