Cyclone V SoC Power Optimization

ID 683713
Date 2/09/2015
Document Table of Contents

1.5.6. Power Measurement Results on Cyclone V SoC Development Kit

Once you have your preferred power measurement set configured and running, you can take power measurements of the Cyclone V SoC device. The table below shows results across four different boards in four different lab locations.

Table 4.  Linux Idle Power Measurement on Cyclone V SoC Development Kit
Power Rail (V) Board 1 Rev A Dev Kit Measured (W) Board 2 Rev C Dev Kit Measured (W) Board 3 Rev C Dev Kit Measured (W) Board 4 Rev C Dev Kit Measured (W) Average (W)
HPS 1.1 0.390 0.40 0.39 0.39 0.393
HPS 1.5 0.081 0.08 0.08 0.08 0.080
HPS 2.5 0.488 0.62 0.47 0.59 0.542
HPS 3.3 0.106 0.06 0.09 0.08 0.084
FPGA 2.5 0.039 0.03 0.05 0.02 0.035
FPGA 1.5 0.007 0.003 0.007 0.01 0.007
FPGA 1.1 0.059 0.13 0.08 0.15 0.105
Total Power 1.170 1.32 1.17 1.31 1.246

Measurements were taken at room temperature running Linux idle. The FPGA portion of the SoC is programmed with the Golden Hardware Reference Design (GHRD) which is included standard with the development kit.

Because a (3mΩ) sense resistor is used on both the HPS 1.5V and the FPGA 1.5V rails, measurements from the board should be divided by 3 on those rails. The results above show the divided by 3 values.

Figure 8. Sense Resistors

The board revision can be found on the back of the Cyclone V SoC Development Kit board with Rev A being the initial engineering sample version. The latest production version have upgraded to the Enpirion power supply solution.

The results are fairly consistent across the different boards with some minor variance in different rails. Once your equipment is set up, these results can be used to verify your measurement techniques are being done properly.