EPCQ-L Serial Configuration Devices Datasheet

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ID 683710
Date 5/18/2018
Public
Document Table of Contents

Write Enable Operation (06h)

When you enable the write enable operation, the write enable latch bit is set to 1 in the status register. You must execute this operation before the write bytes, write status, erase bulk, erase sector, erase die, extended quad input fast write bytes, 4BYTEADDREN, and 4BYTEADDREX operations.

The following figure shows the timing diagram for the write enable operation.

Figure 9. Write Enable Operation Timing Diagram

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