EPCQ-L Serial Configuration Devices Datasheet

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ID 683710
Date 5/18/2018
Public
Document Table of Contents

Status Register

Table 14.  Status Register Bits
Bit Name Value Description
7 None
6 BP3 (Block Protect Bit) 12 Table 15 through Table 20 list the protected area with reference to the block protect bits. Determine the area of the memory protected from being written or erased unintentionally.
5 TB (Top/Bottom Bit)
  • 1=Protected area starts from the bottom of the memory array.
  • 0=Protected area starts from the top of the memory array.
Determine that the protected area starts from the top or bottom of the memory array.
4 BP212 Table 15 through Table 20 list the protected area with reference to the block protect bits. Determine the area of the memory protected from being written or erased unintentionally.
3 BP112
2 BP012
1 WEL (Write Enable Latch Bit)
  • 1=Allows the following operation to run:
    • Write Bytes
    • Write Status Register
    • Erase Bulk
    • Erase Die
    • Erase Sector
  • 0=Rejects the above mentioned operations.
Allows or rejects certain operation to run.
0 WIP (Write in Progress Bit)
  • 1=One of the following operation is in progress:
    • Write Status Register
    • Write NVCR
    • Write Bytes
    • Erase
  • 0=no write or erase cycle in progress
Indicates if there is a command in progress.
12 The erase bulk and erase die operation is only available when all the block protect bits are set to 0. When any of the block protect bits are set to 1, the relevant area is protected from being written by a write bytes operation or erased by an erase sector operation.

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