EPCQ-L Serial Configuration Devices Datasheet

Download PDF
ID 683710
Date 5/18/2018
Public
Document Table of Contents
Document Table of Contents x
EPCQ-L Serial Configuration Devices Datasheet
EPCQ-L Serial Configuration Devices Datasheet x
Supported Devices Features Operating Conditions Pin Information Device Package and Ordering Code Memory Array Organization Memory Operations Registers Summary of Operation Codes Power Mode Timing Information Programming and Configuration File Support Document Revision History for EPCQ-L Serial Configuration Devices Datasheet
Operating Conditions x
Absolute Maximum Ratings Recommended Operating Conditions DC Operating Conditions ICC Supply Current Capacitance
Pin Information x
EPCQ-L Device Pin Description
Device Package and Ordering Code x
Package Ordering Code
Memory Array Organization x
Address Range for EPCQ-L256 Address Range for EPCQ-L512 Address Range for EPCQ-L1024
Memory Operations x
Timing Requirements Addressing Mode
Registers x
Status Register Flag Status Register Non-Volatile Configuration Register
Status Register x
Read Status Register Operation (05h) Write Status Register Operation (01h)
Read Status Register Operation (05h) x
Block Protection Bits in EPCQ-L256 when TB Bit is Set to 0 Block Protection Bits in EPCQ-L256 when TB Bit is Set to 1 Block Protection Bits in EPCQ-L512 when TB Bit is Set to 0 Block Protection Bits in EPCQ-L512 when TB Bit is Set to 1 Block Protection Bits in EPCQ-L1024 when TB Bit is Set to 0 Block Protection Bits in EPCQ-L1024 when TB Bit is Set to 1
Flag Status Register x
Read Flag Status Register Operation(70h)
Non-Volatile Configuration Register x
Read Non-Volatile Configuration Register Operation (B5h) Write Non-Volatile Configuration Register Operation (B1h)
Summary of Operation Codes x
4BYTEADDREN and 4BYTEADDREX Operations (B7h and E9h) Write Enable Operation (06h) Write Disable Operation (04h) Read Bytes Operation (03h) Fast Read Operation (Bh) Extended Quad Input Fast Read Operation (EBh) Read Device Identification Operation (9Eh or 9Fh) Write Bytes Operation (02h) Extended Quad Input Fast Write Bytes Operation (12h) Erase Bulk Operation (C7h) Erase Die Operation (C4h) Erase Sector Operation (D8h)
Timing Information x
Write Operation Timing Read Operation Timing
EPCQ-L Serial Configuration Devices Datasheet

Flag Status Register

Table 21.  Flag Status Register Bits
Bit Name Value Description
7 Write or Erase Controller14
  • 1=Ready
  • 0=Busy

Indicates whether one of the following operation is in progress:

  • Write Status Register
  • Write NVCR
  • Write Bytes
  • Erase
6 Erase suspend
  • 1=In effect
  • 0=Not in effect
 Indicates whether an Erase operation has been or is going to be suspended.
Note: Status bits are reset automatically
5 Erase
  • 1=Failure or protection error
  • 0=Clear
 Indicates whether an Erase operation has succeeded or failed.
4 Write
  • 1=Failure or protection error
  • 0=Clear
 Indicates whether a Write Bytes operation has succeeded or failed; also an attempt to write a 0 to a 1 when VPP = VPPH and the data pattern is a multiple of 64 bits.
3 Reserved
2 Write suspend
  • 1=In effect
  • 0=Not in effect
 Indicates whether a Write Bytes operation has been or will be suspended.
1 Protection
  • 1=Failure or protection error
  • 0=Clear
 Indicates whether an Erase or Write Bytes operation has attempted to modify the protected array sector.
0 Addressing
  • 1=4-bytes addressing
  • 0=3-bytes addressing
 Indicates the addressing mode used.

Section Content
Read Flag Status Register Operation(70h)

14 Write or erase controller bit = NOT write in progress bit.
Level Two Title