5.3.6. The FMC Tab
This tab allows you to perform loopback tests on the FMC port.
The following sections describe controls in the FMC tab.
- PLL Lock: Shows the PLL locked or unlocked state.
- Pattern Sync: Shows the pattern synced or not synced state. The pattern is considered synced when the start of he data data sequence is detected.
- Details: Shows the PLL lock, pattern sync status and number of errors per channel.
- Serial Loopback: Routes signals between the transmitter and receiver.
- VOD: Specifies the voltage output differential of the transmitter buffer.
- Pre-emphasis tap:
- 1st pre - Specifies the amount of pre-emphasis on the pre-tap of the transmitter buffer.
- 2nd pre - Specifies the amount of pre-emphasis on the second pre-tap of the transmitter buffer.
- 1st post - Specifies the amount of pre-emphasis on the first post tap of the transmitter buffer.
- 2nd post - Specifies the amount of pre-emphasis on the second post tap of the transmitter buffer.
- Equalizer: Specifies the AC gain setting for the receiver equalizer in four stage mode.
- DC gain: Specifies the DC gain setting for the receiver equalizer in four stage mode.
- VGA: Specifies the VGA gain value.
- PRBS 7- Selects pseudo-random 7-bit sequences
- PRBS 15- Selects pseudo-random 15-bit sequences
- PRBS 23- Selects pseudo-random 23-bit sequences
- PRBS 31-Selects pseudo-random 31-bit sequences
- high_freq - Selects highest frequency divide-by-2 data pattern 10101010
- low_freq - Selects lowest frequency divide-by-33 data pattern
- Detected errors - Displays the number of data errors detected in the hardware.
- Inserted errors - Displays the number of errors inserted into the transmit data stream.
- Insert Error - Inserts a one-word error into the transmit data stream each time you click the button. Insert Error is only enabled during transaction performance analysis.
- Clear - Resets the Detected error and Inserted error counters to zeroes.
Stop - Terminates transaction performance analysis.
TX and RX performance bars - Shows the percentage of maximum theoretical data rate that the requested transactions are able to achieve.
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